MISSION: EMBEDDED HARDWARE // MONTREAL, QC → ANYWHERE

BENJAMIN
TROST /
HARDWARE
& EMBEDDED

Electrical Engineering @ McGill University, class of '28. I've been building things as long as I can remember: PCs, custom keyboards, and now the boards that run a formula-style EV, from safety-critical circuits to the firmware that ties them together. I went into EE because I like solving complex problems, and vehicle electrical systems have no shortage of them.

Inspect the hardware Establish link
BT
LVBMSLVBMS
BSPDBSPD
TSIL driverTSIL DRV
Light barsLIGHT BARS
BrakelightBRAKELIGHT
FLIGHT LOG

EXPERIENCE

SUMMER 2026

Electrical Engineering Intern

Orbis Labs
  • Developed bare-metal C firmware on STM32, implementing a driver-level FSM managing cellular module init, communication, and state transitions via AT commands.
  • Integrated a cellular module into firmware, configuring CoAP/DTLS for secure remote telemetry on a radar-based flood gauge.
  • Optimized product BOM via schematic analysis and component sourcing, MCUs, LTE modems, USB connectors.
  • Configured and debugged custom BMS hardware in TI BQStudio; overrode protective FETs to wake fuel gauge boards.
  • Architected LabVIEW DAQ testbenches and GUIs validating prototype power and accumulator metrics from accelerometer serial data.
FALL 2025, PRESENT

PCB Project Lead

McGill Formula Electric
  • Lead design, layout, and review of PCBs critical to the vehicle's low-voltage and safety systems: BSPD, LVBMS, TSIL/RTM driver boards, lighting modules.
  • Redesigned brakelight and RTM boards to a low-side switch architecture; moved to aluminum-core PCBs for thermal management.
  • Spearheaded an LVBMS chip-architecture switch, migrating comms UART → SPI for modularity.
  • Mentor new members in Altium Designer schematic capture and layout; set team-wide design standards.
FALL 2024, FALL 2025

Harnessing & DAQ Sub-lead

McGill Formula Electric
  • Helped design, fabricate, and test 8 custom harnesses (500+ wires) to IPC/WHMA-A-620, at a 0.2% error rate.
  • Ran 3 rounds of hardware-in-the-loop integration testing via Hi-Pot and continuity checks; signal integrity and latency analysis on the vehicle CAN architecture with a DSO.
  • Manufactured a 12S3P LiPo low-voltage pack via spot-welding, integrating monitoring lines directly to the LVBMS.
  • Cut total harness subsystem weight 25% through revamped trade studies and manufacturing methodology.
SUMMER 2022

Research Intern

Zon Lab
  • Zebrafish sickle-cell anemia research, injected embryos with experimental treatments, monitored GFP fluorescence for genetic response.
  • Presented findings to 20+ doctors, researchers, and technicians.
HARDWARE BAY

BOARD DESIGNS

// Renders generated from the actual layout files. Ranked by design complexity.

LVBMS printed circuit board, top view
BOARD 01 // FLAGSHIP

LVBMS

Low-Voltage Monitoring System for the LV battery, giving the LV pack the same visibility the rules require for the HV accumulator. Monitors per-cell voltage and temperature across the 12S3P pack (RC-filtered NTC taps off VREF1) and pack current via hall-effect sensor. Passive balancing bleeds every cell down to the lowest cell's potential. Talks SPI to an STM32, which puts telemetry on critical CAN through a transceiver; Q2 gives the MCU a software battery disconnect (LV_SW). Power tree: ~30V pack → 24V (switching reg w/ UVLO) → 5V → 3.3V. Design complete; fab pending.

SPIPASSIVE BALANCINGHALL CURRENT SENSE
4-LAYER // 115 × 62 MM // 249 COMPONENTS // 159 NETS

Pack monitor, drag cell voltages

PACK: - I_PACK: -
CAR BUS

// Passive balancing, live: every cell above the lowest bleeds down to its potential. Drag a cell up and watch it come back. Lowest cell shown green.

BSPD printed circuit board, top view
BOARD 02 // SAFETY-CRITICAL

BSPD

Brake System Plausibility Device: the rules-mandated, non-programmable circuit that shuts the car down if brake and throttle are pressed together. Open-collector comparators give active-low fault logic in three classes: power fault (sensor > 4.8V), ground fault (sensor < 0.2V), and plausibility fault (brake & current both past their references). Any fault held > 500 ms charges the RC delay past 3.25V and fires BSPD_SD. Thresholds live on 10k pots, retuned yearly, no rework.

ANALOGACTIVE-LOWFSAE RULES
2-LAYER // 55 × 37 MM // 93 COMPONENTS

Sensor inputs

0.50V
0.50V

Reference pots (10k)

1.25V
2.00V
0.70V

Fault logic (active-low)

PWR_FLT GND_FLT PLAUS_FLT U6 NAND

500 ms delay → shutdown

0.00V
BSPD_SD (LATCHED) BRAKELIGHT DRAIN

// BRAKELIGHT drain fires on its own window comparator, above BRAKE_LOW_REF (a third 10k pot on the real board), below the 4.8V rail, independent of the fault tree. Red line on the cap bar = 3.25V trip. Clear the fault before the cap gets there and it discharges; hold it 500 ms and the car is done until power cycle.

TSIL driver printed circuit board, top view
BOARD 03 // DRIVER

TSIL DRIVER

Drives the tractive-system indicator lights. BMS_SIG and IMD_SIG are active-low faults into a NOR gate: either one sets FLT high, opening the N-channel FET and gating a 555-derived LIGHT_CLOCK through AND gates, flashing red. No fault: FLT low, Q2 → Q3, static green. HV_ON_SIG passes straight through as RTML_OUT to the ready-to-move light.

LOW-SIDE SWITCH555 TIMERNOR/AND LOGIC
2-LAYER // 41 × 21 MM // 35 COMPONENTS

Fault inputs (active-low)

TSIL output

FLT LIGHT_CLOCK RTML_OUT → RTM

// Green steady = system nominal. Either fault low → NOR high → red on the 555 clock.

TSIL LED light bar PCB RTM LED light bar PCB
BOARD 04 // LIGHTING

TSIL + RTM LIGHT BARS

The lights themselves, on aluminum-core PCB. Routed entirely single-sided (zero vias) since metal-core boards can't take plated through-holes cheaply, with traces sized for continuous LED current. TSIL carries two LED sets: green always on when healthy, red flashed by the driver's 555 on a BMS/IMD fault. RTM flashes on the driver's ready-to-move signal.

AL-CORE PCBSINGLE-SIDED0 VIAS
1-LAYER AL-CORE // 68 + 73 MM BARS
Triangular brakelight board
BOARD 05 // LIGHTING

BRAKELIGHT

The red triangle at the back of the car: 36 LEDs in six strings behind a resettable PTC fuse, lit by the BSPD's low-side Brake_Light_Drain. All logic lives upstream on the BSPD; this board is just the LED matrix and copper.

LOW-SIDE DRIVEN36 LEDTRIANGULAR
TRIANGULAR // DRIVEN BY BSPD
PRE-FLIGHT

SYSTEMS CHECK

EDA / Software

  • Altium Designer
  • LTSpice
  • RapidHarness
  • TI BQStudio
  • LabVIEW
  • STM HAL · Embedded C
  • Python
  • Linux · Bash
  • Git

Protocols

  • CAN bus
  • SPI · I2C · UART
  • BLE
  • CoAP · DTLS
  • IPC/WHMA-A-620

Hardware & Lab

  • PCB design & layout
  • DSO / signal integrity
  • Harness fabrication
  • Precision soldering
  • Spot welding
  • Hi-Pot testing